Author: Christian Gontrand

Towards a Modeling Synthesis of Two or Three-Dimensional Circuits Through Substrate Coupling and Interconnections: Noises and Parasites

eBook: US $69 Special Offer (PDF + Printed Copy): US $153
Printed Copy: US $119
Library License: US $276
ISBN: 978-1-60805-827-3 (Print)
ISBN: 978-1-60805-826-6 (Online)
Year of Publication: 2014
DOI: 10.2174/97816080582661140101


The number of transistors in integrated circuits doubles every two years, as stipulated by Moore’s law, and this has been the driving force for the huge development of the microelectronics industry in the past 50 years – currently advanced to the nanometric scale.

This ebook is dedicated to electronic noises and parasites, accounting for issues involving substrate coupling and interconnections, in the perspective of the 3D integration: a second track for enhancing integration, also compatible with Moore’s law. This reference explains the modeling of 3D circuits without delving into the latest advances, but highlights crucial problems, for instance electro-thermo-mechanical problems, which could be addressed through 3D modeling. The ebook also explains electromagnetic interferences, at different modeling levels (device and circuit) oriented towards 3D integration technologies. It also covers substrate noise, such as disturbances of digital blocks, power bounces, phase noise in oscillators, both at the device level, such as carriers or field fluctuations, and circuit levels. The entanglement between interconnect and substrate is also discussed.

This ebook serves as a reference for advanced graduates or researchers in the field of micro and nano electronics interested in topics relevant to electromagnetic interference or the ‘noise’ domain, at device or circuit and system levels.


The doubling of number of transistors in integrated circuits every two years, as stipulated by Moore’s law, has been the driving force for the huge development of microelectronics industry in the past 50 years. The Moore’s law has enabled the enhancement of complexity and density of planar integrated circuits in 2D of all functions on a single chip, resulting in the emergence of real system-on-chip (SOC). On the other hand, the integration of all these functions can be achieved through 3D integration. There are basically three types of 3D integration levels i.e. 3D IC packaging, 3D IC integration, and, 3D Si integration. These schemes are mostly different because the TSV (through-silicon via) applies to 3D IC and Si integrations, but not to 3D IC packaging. The use of TSV, with the new concept in which every chip or interposer could have two surfaces with circuits, is therefore at the heart of 3D IC and Si integration development. Continued technology scaling together with the integration of heterogeneous technologies on a single chip means that device performance should continue to outperform inter-connect and packaging capabilities, which raises several engineering challenges, such as power management, noise isolation, and intra and inter-chip communication. 3D Si heterogeneous integration is probably the right way to go in order to compete with Moore’s law in the frame of the so-called “More than Moore” application field.

In this eBook, Prof. C. Gontrand aims at providing a modeling synthesis of two or three-dimensional circuits with emphasis on noise and parasitic accounting for substrate coupling and interconnection issues.

In chapter 1, the author underlines that, when increasing interconnect densities and rising cost of integrated circuit (IC) manufacturing, 3D architectures for IC integration are a very promising alternative to standard 2D designs, and, that 3D technology is facing many technological challenges, like completion of vertical interconnects (TSV) which ensure the signal transmission, bonding with alignment of functional dies and substrate thinning. However, he also notices that a lot of benefits in circuit performances can be achieved by 3D integration.

In chapter 2, the author discusses the generation of digital parasitics, their propagation through the substrate, and their effects on analog devices. First, he explains how to characterise the substrate noise, in the time and frequency domains, in order to identify the major parameters that control substrate noise generation, propagation, and reception. Second, he investigates the noise impact on analog circuits from a circuit-level point of view.

In chapter 3, the author handles classical methods for noise analysis at a device point of view. They allow identifying a set of microscopic noise sources in terms of carrier velocity and population fluctuations - called diffusion and generation-recombination noise sources, respectively. Then, he evaluates the effect of microscopic fluctuations on voltage or current fluctuations at the device terminals.

In chapter 4, the author deals with propagation and radiative effects, which become more and more important in integrated circuits. Today deep submicron semiconductor devices are operated at very high frequencies (> GHz). This is particularly important for the characterization of interconnected structures loaded at digital and driver levels. Indeed, it is well known that electromagnetic compatibility (EMC) and signal integrity (SI) are strongly affected by the geometry of interconnects and by the possibly complex nonlinear/dynamic behavior of the electronic devices located at their terminations. At this point, the author is undertaking a detailed semiconductor analysis based on the time-domain drift-diffusion model (DDM) in conjunction with electromagnetic model relying on Maxwell's equations.

In the last chapter, the author demonstrates the effectiveness of such a modeling approach, which is validated in a wide frequency range from DC to 20 GHz. Nevertheless, at high frequency, he shows that substrate-coupling effects are no more negligible and must be included in the overall 3D system electrical description. That is why the author eventually proposes a substrate extraction method, based on transmission line method (TLM) or Green functions, to model the substrate network and interconnect entanglement.

G. Ghibaudo
Director of Research at CNRS


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